HD404849 Datasheet, PDF (66/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
Timer C Operations:
• Free-running/reload timer operation: The free-running/reload operation, input clock source, and
prescaler division ratio are selected by timer mode register C1 (TMC1: $00D).
Timer C is initialized to the value set in timer write register C (TWCL: $00E, TWCU: $00F) by
software and incremented by one at each clock input. If an input clock is applied to timer C after it has
reached $FF, an overflow is generated. In this case, if the reload timer function is enabled, timer C is
initialized to its initial value set in timer write register C; if the free-running timer function is enabled,
the timer is initialized to $00 and then incremented again.
The overflow sets the timer C interrupt request flag (IFTC: $002, bit 2). IFTC is reset by software or
MCU reset. Refer to figure 3 and table 1 for details.
• Watchdog timer operation: Timer C is used as a watchdog timer for detecting out-of-control program
routines by setting the watchdog on flag (WDON: $020, bit 1) to 1. If a program routine runs out of
control and an overflow is generated, the MCU is reset. Program runaway can be controlled by
initializing timer C by software before it reaches $FF.
• Timer output operation: The following four output modes can be selected for timer C by setting timer
mode register C2 (TMC2: $014).
 Toggle
 0 output
 1 output
 PWM output
By selecting the timer output mode, pin R1₁/TOC is set to TOC. The output from TOC is reset low by
MCU reset.
 Toggle output: The operation is basically the same as that of timer-B’s toggle output.
 0 output: The operation is basically the same as that of timer-B’s 0 output.
 1 output: The operation is basically the same as that of timer-B’s 1 output.
 PWM output: When PWM output mode is selected, timer C provides the variable-duty pulse output
function. The output waveform differs depending on the contents of timer mode register C1
(TMC1: $00D) and timer write register C (TWCL: $00E, TWCU: $00F). The output waveform is
shown in figure 43 (2).
Registers for Timer C Operation: By using the following registers, timer C operation modes are selected
and the timer C count is read and written.
 Timer mode register C1 (TMC1: $00D)
 Timer mode register C2 (TMC2: $014)
 Timer write register C (TWCL: $00E, TWCU: $00F)
 Timer read register C (TRCL: $00E, TRCU: $00F)
• Timer mode register C1 (TMC1: $00D): Four-bit write-only register that selects the free-running/reload
timer function, input clock source, and prescaler division ratio as shown in figure 52. It is reset to $0 by
MCU reset.
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