HD404849 Datasheet, PDF (58/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

Timer mode register A (TMA: $008)
Bit
Initial value
Read/Write
Bit name
3
0
W
TMA3
2
0
W
TMA2
1
0
W
TMA1
0
0
W
TMA0
HD404849 Series
Source Input clock
TMA3 TMA2 TMA1 TMA0 prescaler frequency Operating mode
0
0
0
0 PSS
2048t_cyc Timer A mode
1 PSS
1024t_cyc
1
0 PSS
512t_cyc
1 PSS
128t_cyc
1
0
0 PSS
1 PSS
32t_cyc
8t_cyc
1
0 PSS
4t_cyc
1 PSS
2t_cyc
1
0
0
0 PSW
32t_Wcyc Time-base
mode
1 PSW
16t_Wcyc
1
0 PSW
8t_Wcyc
1 PSW
2t_Wcyc
1
0
0 PSW
1/2t_Wcyc
1 Inhibited
1 Don’t PSW and TCA reset
care
Note: 1. t_Wcyc = 244.14 µs (when a 32.768-kHz crystal oscillator is used)
2. Timer counter overflow output period (seconds) = input clock period (seconds) 256.
3. If PSW or TCA reset is selected while the LCD is operating, LCD operation halt_×s
(power switch goes off and all SEG and COM pins are grounded).
When an LCD is connected for display, the PSW and TCA reset periods must be
set in the program to the minimum.
4. The division ratio must not be modified during time-base mode operation,
otherwise an overflow cycle error will occur.
Figure 41 Timer Mode Register A (TMA)
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