HD404849 Datasheet, PDF (16/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
Table 1 Initial Values After MCU Reset
Item
Abbr.
Program
counter
(PC)
Status flag
(ST)
Stack pointer
(SP)
Interrupt
Interrupt enable flag (IE)
flags/mask
Interrupt request flag (IF)
Interrupt mask
(IM)
I/O
Port data register
(PDR)
Data control register
(DCD0,
DCD1)
(DCD2)
(DCR0–
DCR3,
DCR6,
DCR7)
Port mode register A (PMRA)
Port mode register B (PMRB)
Port mode register C
bits 3, 1, 0
(PMRC3,
PMRC1,
PMRC0)
Detection edge select (ESR1)
register 1
Detection edge select (ESR2)
register 2
Timer/
counters,
serial
interface
Timer mode register A (TMA)
Timer mode register B1 (TMB1)
Timer mode register B2 (TMB2)
Timer mode register C1 (TMC1)
Timer mode register C2 (TMC2)
Timer mode register D1 (TMD1)
Timer mode register D2 (TMD2)
Initial
Value
$0000
1
$3FF
0
Contents
Indicates program execution point from start
address of ROM area
Enables conditional branching
Stack level 0
Inhibits all interrupts
0
Indicates there is no interrupt request
1
Prevents (masks) interrupt requests
All bits 1 Enables output at level 1
All bits 0 Turns output buffer off (to high impedance)
---0
All bits 0
- - 00
- 000
000
Refer to description of port mode register A
Refer to description of port mode register B
Refer to description of port mode register C
0000
00 - -
0000
Disables edge detection
Disables edge detection
Refer to description of timer mode register A
0000
- - 00
0000
- 000
0000
0000
Refer to description of timer mode register B1
Refer to description of timer mode register B2
Refer to description of timer mode register
C1
Refer to description of timer mode register
C2
Refer to description of timer mode register
D1
Refer to description of timer mode register
D2
16