HD404849 Datasheet, PDF (40/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
Internal Oscillator Circuit
A block diagram of the clock generation circuit is shown in figure 25. As shown in table 22, a ceramic or
crystal oscillator can be connected to OSC₁ and OSC₂, and a 32.768-kHz oscillator can be connected to X1
and X2. The system oscillator can also be operated by an external clock. Bit 1 (SSR1) of the system clock
select register (SSR: $029) must be set according to the fre quency of the oscillator connected to OSC₁ and
OSC₂ (figure 26).
Note: If the system clock select register (SSR: $029) setting does not match the oscillator frequency,
subsystems using the 32.768-kHz oscillation will malfunction.
LSON
OSC₂
OSC₁
X1
X2
System ^fOSC 1/4 ^fcyc Timing
oscillator
division
circuit
t_cyc
generator
circuit
f_X
f_SUB
Sub-
system
1/8 or 1/4
Timing
division ^tsubcyc generator
oscillator
circuit *
circuit
ø_CPU
System
clock
selection
ø_PER
TMA3
CPU with ROM,
RAM, registers,
flags, and I/O
Peripheral
function
interrupt
1/8
division
circuit
Timing
f_W generator
circuit
t_Wcyc
Time-base
clock øCLK
selection
Time-base
interrupt
Note: * 1/8 or 1/4 division ratio can be selected by setting bit 2 of the system
clock select register (SSR: $029).
Figure 25 Clock Generation Circuit
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