HD404849 Datasheet, PDF (29/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
Table 20 Operations in Low-Power Dissipation Modes
Function
Stop Mode
Watch Mode
Standby Mode
Subactive Mode*²
CPU
Reset
Retained
Retained
OP
RAM
Retained
Retained
Retained
OP
Timer A
Reset
OP
OP
OP
Timer B
Reset
Stopped
OP
OP
Timer C
Reset
Stopped
OP
OP
Timer D
Reset
Stopped
OP
OP
Serial
Reset
Stopped*³
OP
OP
A/D
Reset
Stopped
OP
Stopped
LCD
Reset
OP*⁴
OP
OP
I/O
Reset*¹
Retained
Retained
OP
Notes: OP implies in operation.
1. Output pins are at high impedance.
2. Subactive mode is an optional function specified on the function option list.
3. Transmission/reception is activated if a clock is input in external clock mode. However,
interrupts stop.
4. When a 32-kHz clock source is used.
Table 21 I/O Status in Low-Power Dissipation Modes
D₀–D₈
D₁₀, D₁₁
R0–R3, R6, R7
Output
Standby Mode, Watch Mode Stop Mode
Retained
High impedance
—
—
Retained or output of peripheral High impedance
functions
Input
Active Mode, Subactive Mode
Input enabled
Input enabled
Input enabled
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