HD404849 Datasheet, PDF (47/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
I/O Pin Type
Peripheral Input
function pins pins
Circuit
V_CC
Input data
INT₀, STOPC
HLT
MIS3
PDR
SI, etc.
A/D input
Pins
INT₀, STOPC
SI, INT₁, INT₂,
INT₃, EVNB,
EVND
AN₀–AN₃
Input control
V_CC
HLT
AN₄–AN₇
MIS3
PDR
A/D input
Input control
Note: The MCU is reset in stop mode, and an peripheral function selections are cancelled. The I/O control
register is reset, so the input/output pins enter high-impedance state.
D Port: Consist of nine input/output pins and two input pins addressed by one bit. D₀–D₈ are high-current
I/O pins, and D₁₀ and D₁₁ are input-only pins.
Pins D₀–D₈ are set by the SED and SEDD instructions, and reset by the RED and REDD instructions.
Output data is stored in the port data register (PDR) for each pin. All pins of the D port are tested by the TD
and TDD instructions.
The on/off statuses of the output buffers are controlled by D port data control registers (DCD0–DCD2:
$02C–$02E) that are mapped to memory addresses (figure 29).
Pins D₁₀ and D₁₁ are multiplexed with peripheral function pins STOPC and INT₀, respectively. The
peripheral function modes of these pins are selected by bits 2 and 3 (PMRC2, PMRC3) of port mode
register C (PMRC: $025) (figure 34).
R Ports: 24 input/output pins addressed in 4-bit units. Data is input to these ports by the LAR and LBR
instructions, and output from them by the LRA and LRB instructions. Output data is stored in the port data
register (PDR) for each pin. The on/off statuses of the output buffers of the R ports are controlled by R
port data control registers (DCR0–DCR3, DCR6, DCR7: $030–$033, $036, $037) that are mapped to
memory addresses (figure 29).
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