HD404849 Datasheet, PDF (36/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
Stop Mode Cancellation by STOPC : The MCU enters active mode from stop mode by inputting STOPC
or RESET. In either case, the MCU starts instruction execution from the starting address (address 0) of the
program. However, the value of the RAM enable flag (RAME: $021, bit 3) differs between cancellation by
STOPC and by RESET. When stop mode is cancelled by RESET, RAME = 0; when cancelled by STOPC,
RAME = 1. RESET can cancel all modes, but STOPC is valid only in stop mode; STOPC input is ignored
in other modes. Therefore, when the program needs to confirm that stop mode has been cancelled by
STOPC (for example, when the RAM contents before entering stop mode are used after transition to active
mode), execute the TEST instruction on the RAM enable flag (RAME) at the beginning of the program.
MCU Operation Sequence: The MCU operates in the sequence shown in figures 20 to 22. It is reset by
an asynchronous RESET input, regardless of its status.
The low-power mode operation sequence is shown in figure 22. With the IE flag cleared and an interrupt
flag set together with its interrupt mask cleared, if a STOP/SBY instruction is executed, the instruction is
cancelled (regarded as an NOP) and the following instruction is executed. Before executing a STOP/SBY
instruction, make sure all interrupt flags are cleared or all interrupts are masked.
Power on
No
RESET = 0 ?
Yes
RAME = 0
Reset MCU
MCU
operation
cycle
Figure 20 MCU Operating Sequence (Power On)
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