HD404849 Datasheet, PDF (32/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

Stop
Standby
Oscillator: Stop
Suboscillator: Active/Stop
Peripheral clocks: Stop
All other clocks: Stop
Oscillator: Active
Peripheral clocks: Active
All other clocks: Stop
HD404849 Series
Watch
Oscillator: Stop
Suboscillator: Active
Peripheral clocks: Stop
All other clocks: Stop
No
RESET = 0?
Yes
No
STOPC = 0?
Yes
RAME = 1
No
RESET = 0?
Yes _{IF0 • IM0 = 1? No}
RAME = 0
Yes
No
IF1 • IM1 = 1?
Yes _{IFTA • IMTA No}
= 1?
Yes
IFTB •
IMTB + IF2 •
No
IM2 = 1?
Yes
IFTC •
IMTC + IF3 •
No
IM3 = 1?
Yes
IFTD • No
IMTD = 1?
(SBY
only)
(SBY
only)
(SBY
only)
(SBY
only)
Yes
IFAD •
IMAD + IFS •
No
IMS = 1?
(SBY _Yes
only)
Restart
processor clocks
Restart
processor clocks
Execute
next instruction
Reset MCU
No
Execute
next instruction
IF = 1,
IM = 0, and
IE = 1?
Yes
Accept interrupt
Figure 15 MCU Operation Flowchart
Stop Mode: In stop mode, all MCU operations stop and RAM data is retained. Therefore, the power
dissipation in this mode is the least of all modes. The OSC₁ and OSC₂ oscillator stops. The X1 and X2
oscillator can be selected to operate by setting bit 3 of the system clock select register (SSR: $029;
operating: SSR3 = 0, stop: SSR3 = 1) (figure 26). The MCU enters stop mode if the STOP instruction is
executed in active mode when bit 3 of timer mode register A (TMA: $008) is set to 0 (TMA3 = 0) (figure
41).
Stop mode is terminated by a RESET input or a STOPC input as shown in figure 16. RESET or STOPC
must be applied for at least one t_RC to stabilize oscillation (refer to the AC Characteristics section). When
the MCU restarts after stop mode is cancelled, all RAM contents before entering stop mode are retained,
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