HD404849 Datasheet, PDF (111/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
Direct Addressing Mode: A program can branch to any address in the ROM memory space by executing
the JMPL, BRL, or CALL instruction. Each of these instructions replaces the 14 program counter bits
(PC₁₃–PC₀) with 14-bit immediate data.
Current Page Addressing Mode: The MCU has 64 pages of ROM with 256 words per page. A program
can branch to any address in the current page by executing the BR instruction. This instruction replaces the
eight low-order bits of the program counter (PC₇–PC₀) with eight-bit immediate data. If the BR instruction
is on a page boundary (address 256n + 255), executing that instruction transfers the PC contents to the next
physical page, as shown in figure 94. This means that the execution of the BR instruction on a page
boundary will make the program branch to the next page.
Instruction
[P]
Opcode
p₃ p₂ p₁ p₀
B register
Accumulator
00
B₃ B₂ B₁ B₀ A₃ A₂ A₁ A₀
Referenced ROM address RA₁₃ RA₁₂ RA₁₁ RA₁₀ RA₉ RA₈ RA₇ RA₆ RA₅ RA₄ RA₃ RA₂ RA₁ RA₀
Address Designation
ROM data
RO₉ RO₈ RO₇ RO₆ RO₅ RO₄ RO₃ RO₂ RO₁ RO₀
Accumulator, B register
B₃
B₂ B₁ B₀
A₃
A₂
A₁
A
0
If RO₈ = 1
ROM data
RO₉ RO₈ RO₇ RO₆ RO₅ RO₄ RO₃ RO₂ RO₁ RO₀
Output registers R1, R2 R2₃ R2₂ R2₁ R2₀ R1₃ R1₂ R1₁ R1₀ If RO₉ = 1
Pattern Output
Figure 93 P Instruction
111