HD404849 Datasheet, PDF (119/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
AC Characteristics (HD404848/HD4048412/HD404849: V_CC = 2.7 to 6.0 V, GND = 0 V, T_a = –20°C to
+75°C; HD4074849: V_CC = 2.7 to 5.5 V, GND = 0 V, T_a = –20°C to +75°C, unless otherwise specified)
Item
Symbol Pin(s)
Min Typ Max Unit Test Condition Note
Clock oscillation
f _OSC
OSC₁, OSC₂ 0.4 —
4.5 MHz 1/4 division
1
frequency
X1, X2
— 32.768 — kHz —
Instruction cycle time t_cyc
—
t _subcyc
—
0.89 —
10 µs
— 244.14 — µs 32-kHz oscillator, 2
1/8 division
— 122.07 — µs 32-kHz oscillator, 2
1/4 division
Oscillation stabilization t_RC
OSC₁, OSC₂ — —
7.5 ms
3
time
(ceramic oscillator)
Oscillation stabilization t_RC
OSC₁, OSC₂ — —
30 ms —
3
time
(crystal oscillator)
External clock high
t _CPH
width
X1, X2
OSC₁
——
105 —
2
s
T_a = –10°C to+60°C 3
— ns f_OSC = 4 MHz
4
External clock low width t_CPL
OSC₁
105 —
— ns f_OSC = 4 MHz
4
External clock rise time t_CPr
OSC₁
——
20 ns f_OSC = 4 MHz
4
External clock fall time t_CPf
OSC₁
——
20 ns f_OSC = 4 MHz
4
INT₀–INT₃, EVNB,
t _IH
INT₀–INT₃,
2—
—
t_cyc/ —
5
EVND high widths
EVNB, EVND
t _subcyc
INT₀–INT₃, EVNB,
t _IL
INT₀–INT₃,
2—
—
t_cyc/ —
5
EVND low widths
EVNB, EVND
t _subcyc
RESET low width
t _RSTL
RESET
2—
—
t _cyc
—
6
STOPC low width
t _STPL
STOPC
1—
—
t _RC
—
7
RESET rise time
t _RSTr
RESET
——
20 ms —
6
STOPC rise time
t _STPr
STOPC
——
20 ms —
7
Input capacitance
C_in
All pins except — —
D₁₁
15 pF f = 1 MHz, V_in = 0 V
D₁₁
——
180 pF f = 1 MHz, V_in = 0 V 8
Notes: 1. When the subsystem oscillator (32.768-kHz crystal oscillator) is used, f_OSC must operate under
one of the following conditions: 0.4 MHz ≤ f_OSC ≤ 1.0 MHz or 1.6 MHz ≤ f_OSC ≤ 4.5 MHz. Set bit 1
of the system clock select register (SSR: $029) to 0 for the former, and 1 for the latter.
2. For the HD404848, HD4048412, and HD404849, instructions can be executed during subactive
mode if V_CC = 2.2 V to 6.0 V.
3. The oscillation stabilization time is defined as the time required for the oscillator to stabilize in the
following three cases:
• After V_CC reaches 2.7 V at power-on
• After RESET input goes low when stop mode is cancelled
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