HD404849 Datasheet, PDF (62/125 Pages) Hitachi Semiconductor – 4-Bit Single-Chip Microcomputer

HD404849 Series
Timer mode register B1 (TMB1: $009)
Bit
Initial value
Read/Write
Bit name
3
0
W
TMB13
2
0
W
TMB12
1
0
W
TMB11
0
0
W
TMB10
Free-running/reload
TMB13 timer selection
0
Free-running timer
1
Reload timer
Input clock period and input
TMB12 TMB11 TMB10 clock source
0
0
0
2048t_cyc
1
512t_cyc
1
0
128t_cyc
1
32t_cyc
1
0
0
8t_cyc
1
4t_cyc
1
0
2t_cyc
1
R1₃/EVNB (external event input)
Figure 44 Timer Mode Register B1 (TMB1)
Writing to this register is valid from the second instruction execution cycle after the execution of the
previous timer mode register B1 write instruction. A timer B initialization by writing to timer write
register B (TWBL: $00A, TWBU: $00B) must be programmed to occur after a mode change becomes
valid.
• Timer mode register B2 (TMB2: $013): Two-bit read/write register that selects the timer B output
mode as shown in figure 45. It is reset to $0 by MCU reset.
Timer mode register B2 (TMB2: $013)
Bit
Initial value
Read/Write
Bit name
3
2
1
—
—
0
—
—
R/W
Not used Not used TMB21
0
0
R/W
TMB20
TMB21 TMB20
0
0
1
1
0
1
R1₀/TOB mode selection
R1₀
R1₀ port
TOB Toggle output
TOB 0 output
TOB 1 output
Figure 45 Timer Mode Register B2 (TMB2)
• Timer write register B (TWBL: $00A, TWBU: $00B): Write-only register consisting of a lower digit
(TWBL) and upper digit (TWBU). The lower digit is reset to $0 by MCU reset, but the upper digit
value cannot be guaranteed. See figures 46 and 47.
62