HD66765 Datasheet, PDF (66/71 Pages) Hitachi Semiconductor – 396-channel Segment Driver with Internal RAM for 4096-color Displays

HD66765
Example Calculation 1 To set the maximum frame frequency to 60 Hz
Display duty: 1/176
Retrace-line period: 0 clock (RTN3 to 0 = 0000)
Operation clock division ratio: 1 division
fosc = 60 Hz × (0 + 25) clock × 1 division × 176 lines = 264 (kHz)
In this case, the CR oscillation frequency becomes 264 kHz. The external resistance value of the CR
oscillator must be adjusted to be 264 kHz. The display duty can be changed by the partial display, etc.
n _{and the frame frequency can be the same by setting the RNT bit and DIV bit to achieve the following.}
ificatio ^{Partial display}
Display duty: 1/40
c _{Retrace-line period: 3 clock (RTN3 to 0 = 0011)}
e _{Operation clock division ratio: 4 division}
Sp Frame frequency = 264 kHz/ ((3 + 25) clock × 4 division × 40 lines) = 58.9 (Hz)
inary ^{Example Calculation 2 Switching the frame frequency to suit animation/static image display}
lim ^{(Animation display)}
Frame frequency: 90 Hz
Pre ^{Display duty: 1/176}
Retrace-line period: 0 clock (RTN3 to 0 = 0000)
Operation clock division ratio: 1 division
fosc = 90 Hz × (0 + 25) clock × 1 division × 176 lines = 396 (kHz)
(Static image display)
Frame frequency: 60 Hz
Display duty: 1/176
Retrace-line period: 13 clock (RTN3 to 0 = 1101)
Operation clock division ratio: 1 division
Frame frequency: 396 kHz/ ((13 + 25) clock × 2 division × 176 lines) = 59.2 (Hz)
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