HD66765 Datasheet, PDF (34/71 Pages) Hitachi Semiconductor – 396-channel Segment Driver with Internal RAM for 4096-color Displays

HD66765
Reset Function
The HD66765 is internally initialized by RESET input. Reset the common driver as its settings are not
automatically reinitialized when the HD66765 is reset. The reset input must be held for at least 1 ms. Do
not access the GRAM or initially set the instructions until the R-C oscillation frequency is stable after
power has been supplied (10 ms).
Instruction Set Initialization:
1. Start oscillation executed
2. Driver output control (NL4–0 = 10101, SGS = 0, CMS = 0)
n _{3. B-pattern waveform AC drive (B/C = 0, ECR = 0, NW5–0 = 00000)}
tio ^{4. Power control 1 (DC2–0 = 000, AP1–0 = 00: LCD power off, STB = 0: Standby mode off, SLP = 0,}
a ^{BS2-0 = 000, BT2-0 = 000)}
ific ^{5. Contrast control (Weak contrast (VR3-0 = 0000, CT6–0 = 0000000))}
6. Entry mode set (HWM = 0, I/D1-0 = 11: Increment by 1, AM = 0: Horizontal move, LG2–0 = 000:
c ^{Replace mode)}
e 7. Compare register (CP7–0: 00000000)
p 8. Display control (VLE2–1 = 00: No vertical scroll, SPT = 0, REV = 0, D1–0 = 00: Display off)
S 9. COM driver interface control (TE = 0, IDX2-0 = 000)
y ^{10. Frame cycle control (DIV1-0 = 00: 1-divided clock, RTN2-0: No retrace line period)}
r _{11. Power control 2 (VC2-0 = 000)}
a _{12. Vertical scroll (VL27–20 = 00000000, VL17–10 = 00000000)}
in _{13. 1st screen division (SE17-10 = 11111111, SS17-10 = 00000000)}
14. 2nd screen division (SE27-20 = 11111111, SS27-20 = 00000000)
lim 15. Horizontal RAM address position (HEA7-0 = 00111111, HSA7-0 = 000000)
e _{16. Vertical RAM address position (VEA7-0 = 10101111, VSA7-0 = 00000000)}
Pr ^{17. RAM write data mask (WM11–0 = 000H: No mask)}
18. RAM address set (AD15–0 = 0000H)
19. Grayscale palette
PK04–00 = 00000, PK14–10 = 00010, PK24–20 = 00100, PK34–30 = 00110,
PK44–40 = 00111, PK54–50 = 01000, PK64–60 = 01001, PK74–70 = 01010,
PK84–80 = 01011, PK94–90 = 01100, PK104–100 = 01101, PK114–110 = 01110,
PK124–120 = 10000, PK134–130 = 10010, PK144–140 = 10101, PK154–150 = 10111
GRAM Data Initialization:
This is not automatically initialized by reset input but must be initialized by software while display is off
(D1–0 = 00).
Output Pin Initialization:
1. LCD driver output pins (SEG/COM): Output GND level
2. Oscillator output pin (OSC2): Outputs oscillation signal
3. Common interface signals (CCS*, CCL, and CDA): Halt
4. Timing signals (CL1, M, FLM, DISPTMG, and DCCLK): Halt
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