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HD66765 Datasheet, PDF (56/71 Pages) Hitachi Semiconductor – 396-channel Segment Driver with Internal RAM for 4096-color Displays
HD66765
7. Read/Write mode 3: AM = 0, LG2–0 = 100/101
This mode is used when the data is horizontally written by comparing the original data and the set
value of compare register (CP11–0). It reads the display data (original data), which has already been
written in the GRAM, compares the original data and the set value of the compare register in byte
units, and writes the data sent from the microcomputer to the GRAM only when the result of the
comparison satisfies the condition. This mode reads the data during the same access-pulse width (68-
system: enabled high level, 80-system: RD* low level) as write operation since reading the original
data does not latch the read data into the microcomputer but temporarily holds it in the read-data
latch. However, the bus cycle requires the same time as the read operation. The write-data mask
function (WM11–0) is also enabled in these operations. After writing, the address counter (AC)
automatically increments by 1 (I/D = 1) or decrements by 1 (I/D = 0), and automatically jumps to the
n counter edge one-raster-row below after it has reached the left or right edges of the GRAM.
tio Operation Examples:
a 1) I/D = "1", AM = "0", LG2-0 = "100" (matched write)
ific 2) CP11—0 = "530"H
3) WM11—0 = "000"H
4) AC = "0000"H
c DB11
DB0
e Write-data mask: 0 0 0 0 0 0 0 0 0 0 0 0
p DB11
DB0
S Compare register:
ry Read data (1):
010100110000
(Matched)
Compare
operaton
010100110000
C
ina Write data (1):
101111000110
Conditional
replacement
R
101111000110
lim Read data (2):
Pre Write data (2):
000011110000
110000111000
Compare
operaton
C
Conditional
replacement
R
000011110000
"0000"H
"0001"H
101111000110
Matched replacement
write data (1)
000011110000
GRAM
Figure 42 Writing Operation of Read/Write Mode 3
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