HD66765 Datasheet, PDF (43/71 Pages) Hitachi Semiconductor – 396-channel Segment Driver with Internal RAM for 4096-color Displays

HD66765
An example of high-speed RAM write with a window address-range specified is shown below.
The window address-range can be rewritten to consecutively and quickly by inserting two dummy writes
at the start of a row and three dummy writes at the end of a row, as determined by using the window
address-range specification bits (HSA1 to 0=10, HEA1 to 0=00).
Writing in the horizontal direction
AM = 0, ID0 = 1
"0000"h
GRAM address map
Window address-range setting
"8012"h
HSA = "12"h, HEA = "30"h
VSA = "80"h, VEA = "A0"h
High-speed RAM write mode
n setting HWM = 1
tio Address set
AD = "8010"h *
ifica ^{Dummy RAM write × 2}
c _{RAM write × 31}
× 152
Window address-range
specification (rewrite area)
"A030"h
Window address-range setting
HSA = "12"h, HEA = "30"h
VSA = "80"h, VEA = "A0"h
"A083"h
pe _{Dummy RAM write × 3}
y ^S _{Note: The address set for the high-speed RAM write must be 00 or 11 according to}
r _{the value of the ID0 bit. Only RAM in the specified window address-range}
a _{will be overwritten.}
Prelimin ^{Figure 32 Example of the High-Speed RAM Write with a Window Address-Range Specification}
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