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HD66765 Datasheet, PDF (6/71 Pages) Hitachi Semiconductor – 396-channel Segment Driver with Internal RAM for 4096-color Displays
HD66765
Pin Functions
Table 1 Pin Functional Description
Signals
Number of
Pins
I/O
Connected to Functions
IM2-1,
3
IM0/ID
I
GND or VCC
Selects the MPU interface mode:
IM2 IM1 IM0/ID MPU interface mode
GND GND GND 68-system 16-bit bus interface
GND GND Vcc 68-system 8-bit bus interface
GND Vcc GND 80-system 16-bit bus interface
tion CS*
1
I
MPU
cifica RS
1
pe E/WR*/SCL 1
I
MPU
I
MPU
inary S RW/RD*
1
I
MPU
Prelim DB0/SDI 1
I/O MPU
GND Vcc Vcc 80-system 8-bit bus interface
Vcc GND ID Serial peripheral interface (SPI)
When a serial interface is selected, the IM0 pin is
used as the ID setting for a device code.
Selects the HD66765:
Low: HD66765 is selected and can be accessed
High: HD66765 is not selected and cannot be
accessed
Must be fixed at GND level when not in use.
Selects the register.
Low: Index/status High: Control
For a 68-system bus interface, serves as an enable
signal to activate data read/write operation.
For an 80-system bus interface, serves as a write
strobe signal and writes data at the low level.
For a synchronous clock interface, serves as the
synchronous clock signal.
For a 68-system bus interface, serves as a signal to
select data read/write operation.
Low: Write High: Read
For an 80-system bus interface, serves as a read
strobe signal and reads data at the low level.
Serves as a 16-bit bidirectional data bus.
For an 8-bit bus interface, data transfer uses DB15-
DB8; fix unused DB7-DB0 to the Vcc or GND level.
For a clock-synchronous serial interface, serves as
the serial data input pin (SDI). The input level is read
on the rising edge of the SCL signal.
6