HD66765 Datasheet, PDF (61/71 Pages) Hitachi Semiconductor – 396-channel Segment Driver with Internal RAM for 4096-color Displays

HD66765
Common Driver Serial Transfer
The HD66765 has an on-chip serial circuit to interface with the common driver (HD66764). Registers of
the common driver can be set by transferring register settings from the HD66765. The serial interface
consists of the serial chip select (CCS*), serial transfer clock (CCL), and serial transfer data (CDA) lines.
The HD66765 serial interface circuit is only for transmitting, and cannot be used for receiving data from
the common driver.
Serial transfer is started by setting the serial transfer register (TE) in the HD66765 to 1. After TE has
been set to 1, CDA will be output in synchronization with CCS*, CCL, and CCL. Transfer is in 16-bit
blocks. The data transferred consists of a common driver index register (IDX2 to 0) and an instruction for
n ^{a register selected by IDX2 to 0. For more information on the common driver indices and instructions,}
tio ^{refer to the common-driver data sheet. Serial transfer is independent of the HD66765′s internal operation,}
so other instructions can be executed during transfer. Serial transfer to the common driver requires a
maximum of 18 clock cycles.
ifica ^{When the serial transfer is finished, TE is automatically cleared to 0. After reading the register to confirm}
that TE=0, serial transfer of the next instruction may be started.
ec _{a) Example of Interface with Common Driver HD66764}
Preliminary ^{Sp MPU}
HD66765
CS*
WR*
RD*
RS
DB15-0
16
CCS*
CCL
CDA
HD66764
CCS*
CCL
CDA
b) Basic Serial Transfer
Transfer start
CCS*
(Output)
Transfer end
CCL
(Output)
CDA
(Output)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
MSB
LSB
IDX2 IDX1 IDX0 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Index
Instruction data
Figure 46 Common Driver Serial Transfer
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