HD66765 Datasheet, PDF (10/71 Pages) Hitachi Semiconductor – 396-channel Segment Driver with Internal RAM for 4096-color Displays

HD66765
Bit Operation
The HD66765 supports the following functions: a write data mask function that selects and writes data
into the GRAM in bit units, and a logic operation function that performs logic operations or conditional
determination on the display data set in the GRAM and writes into the GRAM. With the 16-bit bus
interface, these functions can greatly reduce the processing loads of the MPU graphics software and can
rewrite the display data in the GRAM at high speed. For details, see the Graphics Operation Function
section.
Address Counter (AC)
The address counter (AC) assigns addresses to the GRAM. When an address set instruction is written into
n the IR, the address information is sent from the IR to the AC.
tio ^{After writing into the GRAM, the AC is automatically incremented by 1 (or decremented by 1). After}
reading from the data, the AC is not updated. A window address function allows for data to be written
ifica ^{only to a window area specified by GRAM.}
Graphics RAM (GRAM)
ec _{The graphics RAM (GRAM) has eight bits/pixel and stores the bit-pattern data of 132 x 176 bytes.}
Sp _{PWM Grayscale Circuit}
ry _{The PWM grayscale circuit generates a PWM signal that corresponds to the grayscale levels as specified}
a _{in the grayscale palette register. Any 4096 out of 13,824 possible colors can be displayed at the same}
in ^{time. For details, see the Grayscale Palette section.}
lim ^{Grayscale Selection Circuit}
re ^{The grayscale selection circuit reads data from the GRAM and controls the signal generated in the PWM}
P ^{grayscale circuit. PWM (pulse width modulation) is used to control each color in the display. For details,}
see the Grayscale Palette section.
Timing Generator
The timing generator generates timing signals for the operation of internal circuits such as the GRAM.
The RAM read timing for display and internal operation timing by MPU access are generated separately
to avoid interference with one another. The timing generator generates the interface signals (M, FLM,
CL1, DISPTMG, and DCCLK) for the common driver.
Oscillation Circuit (OSC)
The HD66765 can provide R-C oscillation simply through the addition of an external oscillation-resistor
between the OSC1 and OSC2 pins. The appropriate oscillation frequency for operating voltage, display
size, and frame frequency can be obtained by adjusting the external-resistor value. Clock pulses can also
be supplied externally. Since R-C oscillation stops during the standby mode, current consumption can be
reduced. For details, see the Oscillation Circuit section.
10