GS4911B Datasheet, PDF (86/113 Pages) Gennum Corporation – HD/SD/Graphics Clock and Timing Generator with GENLOCK

GS4911B/GS4910B Data Sheet
Table 3-13: Configuration and Status Registers (Continued)
Register Name
Address Bit
Description
R/W Default
N_v
21h-20h
31-0
A non-zero number programmed in this register defines R/W
–
the numerator for the ratio of the video clock to the
27MHz reference.
This register can be used for creating custom video
clock frequencies.
NOTE: Once this register is programmed, it must be
updated using bit 6 of register 16h.
The default value of this register will vary depending on
the output video standard selected.
Address 20h = bits 15-0
Address 21h = bits 31-16
Reference: Section 3.9.1 on page 72
D_v
23h-22h
31-0
A non-zero number programmed in this register defines R/W
–
the denominator for the ratio of the video clock to the
27MHz reference.
This register can be used for creating custom video
clock frequencies.
NOTE: Once this register is programmed, it must be
updated using bit 6 of register 16h.
The default value of this register will vary depending on
the output video standard selected.
Address 22h = bits 15-0
Address 23h = bits 31-16
Reference: Section 3.9.1 on page 72
36655 - 2 April 2006
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