GS4911B Datasheet, PDF (106/113 Pages) Gennum Corporation – HD/SD/Graphics Clock and Timing Generator with GENLOCK

Application HOST
GS4911B/GS4910B Data Sheet
GS4911B/GS4910B
CS_TMS
SCLK_TCLK
SDIN_TDI
Tri-State
Figure 3-20: System JTAG
3.14 Device Power-Up
In-circuit ATE probe
SDOUT_TDO
JTAG/HOST
3.14.1 Power Supply Sequencing
The GS4911B/GS4910B has a recommended power supply sequence. To ensure
correct power-up, the ANALOG_VDD and CORE_VDD power pins should be
powered before IO_VDD.
Device pins may be driven prior to power-up without causing damage.
3.15 Device Reset
In order to initialize operating conditions to their default states, the application layer
must hold the RESET signal LOW during power up and for a minimum of 500us
after the last supply has reached its operating voltage.
36655 - 2 April 2006
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