GS4911B Datasheet, PDF (32/113 Pages) Gennum Corporation – HD/SD/Graphics Clock and Timing Generator with GENLOCK

GS4911B/GS4910B Data Sheet
Table 2-2: AC Electrical Characteristics (Continued)
V_DD = 1.8V, T_A = 0°C to 70°C, unless otherwise specified.
Parameter
Symbol
Condition
Min
Typ
Max Units Notes
PCLK1 & PCLK2 Rise/Fall Times –
15pF load
20% - 80%
–
–
–
PCLK3 Rise/Fall Time
–
20% - 80%
PCLK Outputs Relative Timing
–
Skew
ACLK Frequency
–
(GS4911B only)
ACLK Duty Cycle
–
(GS4911B only)
ACLK1-3 Rise/Fall Times
–
15pF load
20% - 80%
(GS4911B only)
–
–
–
ACLK Outputs Relative
–
Timing Skew
(GS4911B only)
Digital Timing Output Delay Time t_OD
Digital Timing Output Hold Time
t_OH
IO_VDD = 1.8V
–
current drive = LOW
–
1.7
ns
–
IO_VDD = 3.3V
–
current drive = LOW
–
1.5
ns
–
IO_VDD = 1.8V
current drive =
HIGH
–
–
1.1
ns
–
IO_VDD = 3.3V
current drive =
HIGH
–
–
0.9
ns
–
100Ω differential
–
load
10pF to ground per
pin
–
850
ps
–
default PCLK phase
-3
–
3
ns
4
delay of zero
–
0.0097
–
49.152
MHz
–
–
40
–
60
%
5
IO_VDD = 1.8V
–
current drive = LOW
IO_VDD = 3.3V
–
current drive = LOW
IO_VDD = 1.8V
–
current drive =
HIGH
IO_VDD = 3.3V
–
current drive =
HIGH
–
-3
–
3.0
ns
–
–
1.5
ns
–
–
2.5
ns
–
–
1.4
ns
–
–
3
ns
4
–
–
–
4.3
ns
6
–
1
–
–
ns
6
36655 - 2 April 2006
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