GS4911B Datasheet, PDF (12/113 Pages) Gennum Corporation – HD/SD/Graphics Clock and Timing Generator with GENLOCK

GS4911B/GS4910B Data Sheet
Table 1-1: Pin Descriptions (Continued)
Pin
Number
Name
Timing
18, 31, 38, IO_VDD
–
50, 62
Type
Power
Supply
19
FSYNC
Non
Input
Synchronous
27, 25, 24, VID_STD[5:0]
23, 22, 21
Non
Input
Synchronous
26, 44
CORE_VDD
–
Power
Supply
Description
Most positive power supply connection for the digital I/O signals.
Connect to either +1.8V DC or +3.3V DC.
NOTE: All five IO_VDD pins must be powered by the same voltage.
REFERENCE SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
The FSYNC external reference signal is applied to this pin by the
application layer.
The first field is defined as the field in which the first broad pulse (also
known as serration) is in the first half of a line. The FSYNC signal should
be set HIGH during the first field for sync-based references.
If the user wishes to select one of the pre-programmed video and/or
timing output signals provided by the device, then this signal must
adhere to one of the 36 defined video or 16 different graphics display
standards supported by the device. In this mode of operation, the
FSYNC input provides an odd/even field input reference.
The FSYNC signal may have analog timing, such as from a sync
separator, or may be digital such as from an SDI deserializer. Section 1.4
on page 20 describes the 36 video formats and 16 graphic formats
recognized by the GS4911B/GS4910B.
For blanking-based references, the FSYNC signal should be set HIGH
during the second field.
NOTE: If the input reference format does not include an F sync signal,
this pin should be held LOW.
CONTROL SIGNAL INPUTS
Signal levels are LVCMOS/LVTTL compatible.
Video Standard Select.
Used to select the desired video/graphic display format for video clock
and timing signal generation.
8 different video and 13 different graphic sample clocks, as well as 35
different video format and 13 different graphic format timing signal
outputs may be selected using these pins.
For details on the supported video standards and video clock frequency
selection, please see Section 1.4 on page 20.
Most positive power supply connection for the digital core. Connect to
+1.8V DC.
36655 - 2 April 2006
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