MC68HC705K1 Datasheet, PDF (78/140 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Multifunction Timer
RTIE — Real-Time Interrupt Enable Bit
This read/write bit enables real-time interrupts. Reset clears RTIE.
1 = Real-time interrupts enabled
0 = Real-time interrupts disabled
TOFR — Timer Overflow Flag Reset
Writing a logic 1 to this write-only bit clears the TOF bit. TOFR always
reads as a logic 0. Reset does not affect TOFR.
RTIFR — Real-Time Interrupt Flag Reset
Writing a logic 1 to this write-only bit clears the RTIF bit. RTIFR
always reads as a logic 0. Reset does not affect RTIFR.
RT1 and RT0 — Real-Time Interrupt Select Bits 1 and 0
These read/write bits select one of four real-time interrupt rates, as
shown in Table 8-1. Because the selected RTI output drives the COP
watchdog, changing the real-time interrupt rate also changes the
counting rate of the COP watchdog. Reset sets RT1 and RT0,
selecting the longest COP timeout period and RTI period.
NOTE:
Changing RT1 and RT0 when a COP timeout is imminent or uncertain
may cause an RTI request to be missed or an additional RTI request to
be generated. Clear the COP timer just before changing RT1 and RT0.
Table 8-1. Real-Time Interrupt Rate Selection
RT1:RT0
Number
of Cycles
to RTI
RTI
Period⁽¹⁾
00
2¹⁴ = 16,384
8.2 ms
01
2¹⁵ = 32,768
16.4 ms
10
2¹⁶ = 65,536
32.8 ms
11
2¹⁷ = 131,072 ^{65.5 ms}
1. At 2-MHz bus, 4-MHz XTAL, 0.5 µs per cycle
Number
of Cycles
to COP Reset
2¹⁷ = 131,072
2¹⁸ = 262,144
2¹⁹ = 524,288
2²⁰ = 1,048,576
COP Timeout
Period⁽¹⁾
65.5 ms
131.1 ms
262.1 ms
524.3 ms
Technical Data
Multifunction Timer
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MC68HC705K1 — Rev. 2.0