MC68HC705K1 Datasheet, PDF (71/140 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Parallel Input/Output (I/O)
Port B
Programming the SWPDI bit to a logic 1 disables both of the port B
pulldown devices. Reset initializes both port B pins as inputs with
pulldown devices disabled when the SWPDI bit is programmed to a
logic 1.
Address:
Read:
Write:
Reset:
$0011
Bit 7
6
5
4
3
2
1
0
0
0
0
0
0
PDIB1
0
0
0
0
0
0
0
= Unimplemented
Figure 7-7. Pulldown Register B (PDRB)
Bit 0
PDIB0
0
PDIB1 and PDIB0 — Port B Pulldown Inhibit Bits 1 and 0
Writing logic 0s to these write-only bits turns on the port B pulldown
devices. Reading pulldown register B returns undefined data. Reset
clears PDIB1 and PDIB0.
1 = Corresponding port B pin pulldown device turned off
0 = Corresponding port B pin pulldown device turned on
Bits 7–2 — Not Used
Bits 7–2 always read as logic 0s.
Programming the SWPDI bit in the mask option register to logic 1 turns
off all port A and port B pulldown devices and disables software control
of the pulldown devices. Reset has no effect on the pulldown devices
when the SWPDI bit is set to a logic 1.
NOTE: Avoid a floating port B input by clearing its pulldown register bit before
changing its DDRB bit from logic 1 to logic 0.
Do not use read-modify-write instructions on pulldown register B.
7.5.4 Port B Logic
Figure 7-8 shows the port B I/O logic.
MC68HC705K1 — Rev. 2.0
Parallel Input/Output (I/O)
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Technical Data