MC68HC705K1 Datasheet, PDF (66/140 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Freescale Semiconductor, Inc.
Parallel Input/Output (I/O)
7.4.3 Pulldown Register A
Programming the SWPDI bit in the mask option register to a logic 0
enables the port A and port B pulldown devices. The port A pulldown
devices sink approximately 100 µA and are under the control of the
PDIA7–PDIA0 bits in pulldown register A (PDRA).
Clearing the PDIA7–PDIA0 bits turns on the pulldown devices of the port
A pins that are configured as inputs. A pulldown device can be turned on
only when its pin is an input. When SWPDI is a logic 0, reset initializes
all port A pins as inputs with pulldown devices turned on.
Programming the SWPDI bit to a logic 1 disables the port A and port B
pulldown devices. Reset initializes all port A pins as inputs with pulldown
devices disabled when the SWPDI bit is programmed to a logic 1.
Address: $0010
Bit 7
6
5
4
3
2
1
Read:
Write: PDIA7 PDIA6 PDIA5 PDIA4 PDIA3 PDIA2 PDIA1
Reset: 0
0
0
0
0
0
0
= Unimplemented
Figure 7-3. Pulldown Register A (PDRA)
Bit 0
PDIA0
0
PDIA7–PDIA0 — Port A Pulldown Inhibit Bits 7–0
Writing logic 0s to these write-only bits turns on the port A pulldown
devices. Reading pulldown register A returns undefined data. Reset
clears bits PDIA7–PDIA0.
1 = Corresponding port A pin pulldown device turned off
0 = Corresponding port A pin pulldown device turned on
NOTE: Avoid a floating port A input by clearing its pulldown register bit before
changing its DDRA bit from logic 1 to logic 0.
Do not use read-modify-write instructions on pulldown register A.
Technical Data
Parallel Input/Output (I/O)
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MC68HC705K1 — Rev. 2.0