MC68HC705K1 Datasheet, PDF (44/140 Pages) Freescale Semiconductor, Inc – HCMOS Microcontroller Unit

Interrupts
Freescale Semiconductor, Inc.
Programming the LEVEL bit to a logic 0 selects the edge-sensitive only
trigger option. When LEVEL = 0:
• A rising edge on a PA3–PA0 pin latches an external interrupt
request if and only if all other PA3–PA0 pins are low and the
IRQ/V_PP pin is high.
• A falling edge on the IRQ/V_PP pin latches an external interrupt
request if and only if all of the PA3–PA0 pins are low.
• A subsequent PA3–PA0 pin interrupt request can be latched only
after the voltage level of the previous PA3–PA0 interrupt signal
returns to a logic 0 and then rises again to a logic 1.
• A subsequent IRQ/V_PP pin interrupt request can be latched only
after the voltage level of the previous IRQ/V_PP interrupt signal
returns to a logic 1 and then falls again to a logic 0.
Technical Data
Interrupts
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MC68HC705K1 — Rev. 2.0