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MC68HC705C9A Datasheet, PDF (63/118 Pages) Motorola, Inc – Microcontrollers
Address Mark Wakeup
9.9 Address Mark Wakeup
In address mark wakeup, the most significant bit (MSB) in a character is used to indicate whether it is an
address (logic 1) or data (logic 0) character. Sleeping receivers will wake up whenever an address
character is received. Systems using this method for wakeup would set the MSB of the first character of
each message and leave it clear for all other characters in the message. Idle periods may be present
within messages and no idle time is required between messages for this wakeup method.
9.10 Receive Data In (RDI)
Receive data is the serial data that is applied through the input line and the SCI to the internal bus. The
receiver circuitry clocks the input at a rate equal to 16 times the baud rate. This time is referred to as the
RT rate in Figure 9-4 and as the receiver clock in Figure 9-6.
The receiver clock generator is controlled by the baud rate register; however, the SCI is synchronized by
the start bit, independent of the transmitter.
Once a valid start bit is detected, the start bit, each data bit, and the stop bit are sampled three times at
RT intervals 8 RT, 9 RT, and 10 RT
(1 RT is the position where the bit is expected to start), as shown in Figure 9-5. The value of the bit is
determined by voting logic which takes the value of the majority of the samples. A noise flag is set when
all three samples on a valid start bit or data bit or the stop bit do not agree.
16X INTERNAL SAMPLING CLOCK
RT CLOCK EDGES FOR ALL THREE EXAMPLES
1RT 2RT 3RT 4RT 5RT 6RT 7RT
IDLE
START
RDI
1
1
1
1
1
1
1
1
0
0
0
0
START
NOISE
RDI
1
1
1
1
1
1
1
1
0
0
1
0
NOISE
RDI
START
1
1
1
0
1
1
1
1
0
0
0
0
Figure 9-4. SCI Examples of Start Bit Sampling Techniques
PREVIOUS BIT
SAMPLES
NEXT BIT
RDI
16RT 1RT
8RT 9RT 10RT
16RT 1RT
Figure 9-5. SCI Sampling Technique Used on All Bits
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
63