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MC68HC705C9A Datasheet, PDF (39/118 Pages) Motorola, Inc – Microcontrollers
Chapter 5
Resets
5.1 Introduction
The MCU can be reset four ways: by the initial power-on reset function, by an active low input to the
RESET pin, by the COP, or by the clock monitor. A reset immediately stops the operation of the instruction
being executed, initializes some control bits, and loads the program counter with a user-defined reset
vector address. Figure 5-1 is a block diagram of the reset sources.
CLOCK MONITOR
COP WATCHDOG
VDD
POWER-ON RESET
STOP
RESET
INTERNAL CLOCK
D R Q RST
RESET
LATCH
Figure 5-1. Reset Sources
TO CPU AND
SUBSYSTEMS
5.2 Power-On Reset (POR)
A power-on-reset occurs when a positive transition is detected on VDD. The power-on reset is strictly for
power turn-on conditions and should not be used to detect a drop in the power supply voltage. There is a
4064 internal processor clock cycle (tcyc) oscillator stabilization delay after the oscillator becomes active.
(When configured as a C9A, the RESET pin will output a logic 0 during the 4064-cycle delay.) If the
RESET pin is low after the end of this 4064-cycle delay, the MCU will remain in the reset condition until
RESET is driven high externally.
5.3 RESET Pin
The function of the RESET pin is dependent on whether the device is configured as an MC68HC05C9A
or an MC68HC05C12A. When it is in the MC68HC05C12A configuration, the pin is input only. When in
MC68HC05C9A configuration the pin is bidirectional. In both cases the MCU is reset when a logic 0 is
applied to the RESET pin for a period of one and one-half machine cycles (tRL). For the MC68HC05C9A
configuration, the RESET pin will be driven low by a COP, clock monitor, or power-on reset.
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
39