MC68HC705C9A Datasheet, PDF (31/118 Pages) Motorola, Inc – Microcontrollers

Addr.
$000D
$000E
$000F
$0010
$0011
$0012
$0013
$0014
$0015
$0016
$0017
$0018
I/O Registers
Register Name
Bit 7
SCI Baud Rate Register ^Read:
BAUD Write:
See page 69. _{Reset: —}
SCI Control Register 1 ^Read: _R8
(SCCR1) Write:
See page 65. _{Reset: U}
SCI Control Register 2 ^Read: _TIE
(SCCR2) Write:
See page 66. _{Reset: 0}
SCI Status Register
(SCSR)
See page 68.
Read:
Write:
Reset:
TDRE
1
SCI Data Register
(SCDR)
See page 65.
Read:
Write:
Reset:
SCD7
Timer Control Register ^Read: _ICIE
(TCR) Write:
See page 53. _{Reset: 0}
Timer Status Register ^{Read: ICF}
(TSR) Write:
See page 54. _{Reset: U}
Input Capture Register High
(ICRH)
See page 56.
Read:
Write:
Reset:
Bit 15
Input Capture Register Low ^{Read: Bit 7}
(ICRL) Write:
See page 56. _Reset:
Output Compare Register
High (OCRH)
See page 56.
Read:
Write:
Reset:
Bit 15
Output Compare Register ^Read: _{Bit 7}
Low (OCRL) Write:
See page 56. _Reset:
Timer Register High
(TRH)
See page 55.
Read:
Write:
Reset:
Bit 15
1
6
5
SCP1
—
0
T8
U
0
TCIE
RIE
0
0
TC
RDRF
1
SDC6
0
SCD5
OCIE TOIE
0
0
OCF
TOF
U
Bit 14
U
Bit 13
Bit 6
Bit 5
Bit 14 Bit 13
Bit 6
Bit 5
Bit 14 Bit 13
1
1
= Unimplemented
4
SCP0
0
M
U
ILIE
0
IDLE
3
—
WAKE
U
TE
0
OR
2
SCR2
U
1
SCR1
U
Bit 0
SCR0
U
0
0
0
RE
RWU SBK
0
0
0
NF
FE
0
0
SCD4
SCD3
Unaffected by reset
0
0
0
0
0
0
0
SCD2
0
SCD1
—
SCD0
0
IEDG OLVL
0
U
0
0
0
0
0
Bit 12
0
Bit 11
0
0
0
Bit 10
Bit 9
Bit 8
Unaffected by reset
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unaffected by reset
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Unaffected by reset
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unaffected by reset
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
1
1
1
1
1
R
= Reserved
U = Unaffected
Figure 2-4. Input/Output Registers (Sheet 2 of 3)
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
31