MC68HC705C9A Datasheet, PDF (18/118 Pages) Motorola, Inc – Microcontrollers

General Description
1.5 Software-Programmable Options (MC68HC05C9A Mode Only)
The C9A option register (OR), shown in Figure 1-4, is enabled only if configured in C9A mode. This
register contains the programmable bits for the following options:
• Map two different areas of memory between RAM and EPROM, one of 48 bytes and one of 128
bytes
• Edge-triggered only or edge- and level-triggered external interrupt (IRQ pin and any port B pin
configured for interrupt)
This register must be written to by user software during operation of the microcontroller.
$3FDF
Read:
Write:
Reset:
Bit 7
RAM0
0
6
5
4
3
2
RAM1
0
0
0
0
0
= Unimplemented
Figure 1-4. C9A Option Register
1
Bit 0
IRQ
1
0
RAM0 — Random Access Memory Control Bit 0
This read/write bit selects between RAM or EPROM in location $0020 to $004F. This bit can be read
or written at any time.
1 = RAM selected
0 = EPROM selected
RAM1— Random Access Memory Control Bit 1
This read/write bit selects between RAM or EPROM in location $0100 to $017F. This bit can be read
or written at any time.
1 = RAM selected
0 = EPROM selected
IRQ — Interrupt Request Bit
This bit selects between an edge-triggered only or edge- and level- triggered external interrupt pin.
This bit is set by reset, but can be cleared by software. This bit can be written only once.
1 = Edge and level interrupt option selected
0 = Edge-only interrupt option selected
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
18
Freescale Semiconductor