MKL04Z32VFK4 Datasheet, PDF (61/658 Pages) Freescale Semiconductor, Inc – KL04 Sub-Family Reference Manual

3.4.8.2 DMA transfers via PIT trigger
Chapter 3 Chip Configuration
The PIT module can trigger a DMA transfer on the first two DMA channels. The
assignments are detailed at PIT/DMA Periodic Trigger Assignments .
3.4.9 DMA Controller Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Peripheral
bridge 0
Register
access
Transfers
DMA Controller
Requests
Topic
Full description
System memory map
Clocking
Power management
Crossbar switch
Requests
Figure 3-12. DMA Controller configuration
Table 3-21. Reference links to related information
Related module
DMA controller
Crossbar switch
Reference
DMA controller
System memory map
Clock distribution
Power management
Crossbar switch
DMA request sources
3.4.10 Computer Operating Properly (COP) Watchdog
Configuration
This section summarizes how the module has been configured in the chip.
KL04 Sub-Family Reference Manual, Rev. 3.1, November 2012
Freescale Semiconductor, Inc.
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