MKL04Z32VFK4 Datasheet, PDF (110/658 Pages) Freescale Semiconductor, Inc – KL04 Sub-Family Reference Manual

Module clocks
MCGIRCLK
OSCERCLK
MCGFLLCLK
TPM clock
SIM_SOPT2[TPMSRC]
Figure 5-5. TPM clock generation
5.7.6 UART clocking
The UART0 module has a selectable clock as shown in the following figure.
NOTE
The chosen clock must remain enabled if the UART0 is to
continue operating in all required low-power modes.
MCGIRCLK
OSCERCLK
MCGFLLCLK
UART0 clock
SIM_SOPT2[UART0SRC]
Figure 5-6. UART0 clock generation
KL04 Sub-Family Reference Manual, Rev. 3.1, November 2012
110
Freescale Semiconductor, Inc.