MKL04Z32VFK4 Datasheet, PDF (214/658 Pages) Freescale Semiconductor, Inc – KL04 Sub-Family Reference Manual

Memory map and register descriptions
PMC_LVDSC2 field descriptions
Field
7
LVWF
Low-Voltage Warning Flag
Description
This read-only status bit indicates a low-voltage warning event. LVWF is set when V_Supply transitions below
the trip point, or after reset and V_Supply is already below V_LVW. LVWF bit may be 1 after power on reset,
therefore, to use LVW interrupt function, before enabling LVWIE, LVWF must be cleared by writing
LVWACK first.
6
LVWACK
5
LVWIE
0 Low-voltage warning event not detected
1 Low-voltage warning event detected
Low-Voltage Warning Acknowledge
This write-only bit is used to acknowledge low voltage warning errors. Write 1 to clear LVWF. Reads
always return 0.
Low-Voltage Warning Interrupt Enable
Enables hardware interrupt requests for LVWF.
4–2
Reserved
1–0
LVWV
0 Hardware interrupt disabled (use polling)
1 Request a hardware interrupt when LVWF = 1
This field is reserved.
This read-only field is reserved and always has the value 0.
Low-Voltage Warning Voltage Select
Selects the LVW trip point voltage (V_LVW). The actual voltage for the warning depends on LVDSC1[LVDV].
00 Low trip point selected (V_LVW = V_LVW1)
01 Mid 1 trip point selected (V_LVW = V_LVW2)
10 Mid 2 trip point selected (V_LVW = V_LVW3)
11 High trip point selected (V_LVW = V_LVW4)
14.5.3 Regulator Status And Control register (PMC_REGSC)
The PMC contains an internal voltage regulator. The voltage regulator design uses a
bandgap reference that is also available through a buffer as input to certain internal
peripherals, such as the CMP and ADC. The internal regulator provides a status bit
(REGONS) indicating the regulator is in run regulation.
NOTE
This register is reset on Chip Reset Not VLLS and by reset
types that trigger Chip Reset not VLLS. See the Reset section
for more information.
KL04 Sub-Family Reference Manual, Rev. 3.1, November 2012
214
Freescale Semiconductor, Inc.