MKL04Z32VFK4 Datasheet, PDF (429/658 Pages) Freescale Semiconductor, Inc – KL04 Sub-Family Reference Manual

Chapter 28 Analog-to-Digital Converter (ADC)
Address: 4003_B000h base + 10h offset + (4d × i), where i=0d to 1d
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
D
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ADCx_Rn field descriptions
Field
31–16
Reserved
15–0
D
Description
This field is reserved.
This read-only field is reserved and always has the value 0.
Data result
28.3.5 Compare Value Registers (ADCx_CVn)
The compare value registers (CV1 and CV2) contain a compare value used to compare
the conversion result when the compare function is enabled, that is, SC2[ACFE]=1. This
register is formatted in the same way as the Rn registers in different modes of operation
for both bit position definition and value format using unsigned or sign-extended 2's
complement. Therefore, the compare function uses only the CVn fields that are related to
the ADC mode of operation.
The compare value 2 register (CV2) is used only when the compare range function is
enabled, that is, SC2[ACREN]=1.
Address: 4003_B000h base + 18h offset + (4d × i), where i=0d to 1d
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
CV
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ADCx_CVn field descriptions
Field
31–16
Reserved
15–0
CV
Description
This field is reserved.
This read-only field is reserved and always has the value 0.
Compare Value.
KL04 Sub-Family Reference Manual, Rev. 3.1, November 2012
Freescale Semiconductor, Inc.
429