SGTL5000XNAA3 Datasheet, PDF (45/84 Pages) Freescale Semiconductor, Inc – Low Power Stereo Codec with Headphone Amp

DATASHEET
SGTL5000
6.2. Chip Configuration
All outputs (LINEOUT, HP_OUT, I2S_OUT) are muted by default on powerup. To
avoid any pops/clicks, the outputs should remain muted during these chip configura-
tion steps. Refer to section 6.2.6 for volume and mute control.
6.2.1. Initialization
6.2.1.1. Chip Powerup and Supply Configurations
After the power supplies for chip is turned on, following initialization sequence
should be followed. Please note that certain steps may be optional or different val-
ues may need to be written based on the power supply voltage used and desired
configuration. The initialization sequence below assumes VDDIO = 3.3V and
VDDA = 1.8V.
//--------------- Power Supply Configuration----------------
// NOTE: This next 2 Write calls is needed ONLY if VDDD is
// internally driven by the chip
// Configure VDDD level to 1.2V (bits 3:0)
Write CHIP_LINREG_CTRL 0x0008
// Power up internal linear regulator (Set bit 9)
Write CHIP_ANA_POWER
0x7260
// NOTE: This next Write call is needed ONLY if VDDD is
// externally driven
// Turn off startup power supplies to save power (Clear bit 12 and 13)
Write CHIP_ANA_POWER
0x4260
// NOTE: The next 2 Write calls is needed only if both VDDA and
// VDDIO power supplies are less than 3.1V.
// Enable the internal oscillator for the charge pump (Set bit 11)
Write CHIP_CLK_TOP_CTRL 0x0800
// Enable charge pump (Set bit 11)
Write CHIP_ANA_POWER
0x4A60
// NOTE: The next 2 modify calls is only needed if both VDDA and
// VDDIO are greater than 3.1V
// Configure the chargepump to use the VDDIO rail (set bit 5 and bit 6)
Write CHIP_LINREG_CTRL 0x006C
//------ Reference Voltage and Bias Current Configuration----------
// NOTE: The value written in the next 2 Write calls is dependent
// on the VDDA voltage value.
// Set ground, ADC, DAC reference voltage (bits 8:4). The value should
// be set to VDDA/2. This example assumes VDDA = 1.8V. VDDA/2 = 0.9V.
// The bias current should be set to 50% of the nominal value (bits 3:1)
Write CHIP_REF_CTRL
0x004E
// Set LINEOUT reference voltage to VDDIO/2 (1.65V) (bits 5:0) and bias cur-
rent (bits 11:8) to the recommended value of 0.36mA for 10kOhm load with 1nF
capacitance
Write CHIP_LINE_OUT_CTRL 0x0322
//----------------Other Analog Block Configurations------------------
// Configure slow ramp up rate to minimize pop (bit 0)
Write CHIP_REF_CTRL
0x004F
// Enable short detect mode for headphone left/right
// and center channel and set short detect current trip level
SGTL5000 EA2 DS-0-3
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