SGTL5000XNAA3 Datasheet, PDF (27/84 Pages) Freescale Semiconductor, Inc – Low Power Stereo Codec with Headphone Amp

DATASHEET
SGTL5000
5.1. System Block Diagram w/ Signal Flow and Gain Map
Figure 10 below shows a block diagram that highlights the signal flow and gain map
for the SGTL5000.
Analog Gain
Digital Gain
LINE_IN
MIC_IN
MIC GAIN
(0dB, 20dB,
30dB, 40dB )
I2S_DIN
I2S_DOUT
Analog
Gain
(0 to
22.5dB)
ADC
Audio
Switch
DAC Volume
Control
-90dB to 0dB
DAC
Headphone Volume Control
-52dB to +12dB
(CHIP_ANA_HP_CTRL)
HP_OUT
Line Out Volume Control
(CHIP_LINE_OUT_VOL)
LINEOUT
Mix
+6dB
AVC
+12dB
Surround
Bass Enhancement
+6dB
Tone Control /GEQ/PEQ
+12dB
Only Gain is shown for the Digital Audio Processing blocks. For complete description
please see Digital Audio Processing section.
Figure 10. System Block Diagram, signal flow and gain
To guarantee against clipping it is important that the gain in a signal path in addition
to the signal level does not exceed 0dB at any point.
5.2. Power
The SGTL5000 has a flexible power architecture to allow the system designer to
minimize power consumption and maximize performance at the lowest cost.
5.2.1.
External Power Supplies
The SGTL5000 requires 2 external power supplies: VDDA and VDDIO. An optional
third external power supply VDDD may be provided externally to achieve lower
power. A description for the different power supplies is as follows:
• VDDA: This external power supply is used for the internal analog circuitry
including ADC, DAC, LINE inputs, MIC inputs, headphone outputs and refer-
ence voltages. VDDA supply ranges are shown in section 1.2. A decoupling
cap should be used on VDDA as shown in the typical connection diagram in
section 4.
• VDDIO: This external power supply controls the digital I/O levels as well as the
output level of LINE outputs. VDDIO supply ranges are shown in section 1.2. A
decoupling cap should be used on VDDIO as shown in the typical connection
diagram in section 4.
SGTL5000 EA2 DS-0-3
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