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| MC68HLC908QY4 Datasheet, PDF (41/182 Pages) Motorola, Inc – Microcontrollers | |||
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INTERNAL
DATA BUS
READ DDRA
WRITE DDRA
WRITE PTA
READ PTA
RESET
DDRAx
PTAx
Functional Description
DISABLE
ADCx
ADC DATA REGISTER
DISABLE
ADC CHANNEL x
INTERRUPT
LOGIC
CONVERSION
COMPLETE
AIEN COCO
BUS CLOCK
ADC VOLTAGE IN
ADCVIN
ADC
ADC CLOCK
CLOCK
GENERATOR
CHANNEL
SELECT
(1 OF 4 CHANNELS)
CH[4:0]
ADIV[2:0]
Figure 3-2. ADC Block Diagram
3.3.2 Voltage Conversion
When the input voltage to the ADC equals VDD, the ADC converts the signal to $FF (full scale). If the input
voltage equals VSS, the ADC converts it to $00. Input voltages between VDD and VSS are a straight-line
linear conversion. All other input voltages will result in $FF if greater than VDD and $00 if less than VSS.
NOTE
Input voltage should not exceed the analog supply voltages.
MC68HLC908QY/QT Family Data Sheet, Rev. 3
Freescale Semiconductor
41
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