MC68HLC908QY4 Datasheet, PDF (30/182 Pages) Motorola, Inc – Microcontrollers

Memory
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
0
0
0
0
0
Break Status and Control
BRKE BRKA
$FE0B
Register (BRKSCR) Write:
See page 138. _Reset:
0
0
0
0
0
0
0
0
Read: LVIOUT
0
0
0
0
0
0
R
$FE0C
LVI Status Register (LVISR)
See page 87.
Write:
Reset: 0
0
0
0
0
0
0
0
$FE0D
↓
$FE0F
Reserved for FLASH Test
R
R
R
R
R
R
R
R
$FFBE
$FFBF
FLASH Block Protect ^Read:
Register (FLBPR) Write:
See page 37. _Reset:
Reserved
BPR7
R
BPR6
R
BPR5
R
BPR4
BPR3
Unaffected by reset
R
R
BPR2
R
BPR1
R
BPR0
R
Read:
$FFC0
Internal Oscillator Trim Value
(Optional)
Write:
Reset:
$FFC1
Reserved
TRIM7
R
TRIM6
R
TRIM5
R
TRIM4 TRIM3
Unaffected by reset
R
R
TRIM2
R
TRIM1
R
TRIM0
R
$FFFF
COP Control Register ^Read:
(COPCTL) Write:
See page 59.
Reset:
LOW BYTE OF RESET VECTOR
WRITING CLEARS COP COUNTER (ANY VALUE)
Unaffected by reset
= Unimplemented
R = Reserved U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 6 of 6)
MC68HLC908QY/QT Family Data Sheet, Rev. 3
30
Freescale Semiconductor