MC68HLC908QY4 Datasheet, PDF (31/182 Pages) Motorola, Inc – Microcontrollers

Vector Priority
Lowest
Highest
Random-Access Memory (RAM)
.
Table 2-1. Vector Addresses
Vector
IF15
IF14
IF13
↓
IF6
IF5
IF4
IF3
IF2
IF1
—
—
Address
$FFDE
$FFDF
$FFE0
$FFE1
Vector
ADC conversion complete vector (high)
ADC conversion complete vector (low)
Keyboard vector (high)
Keyboard vector (low)
—
Not used
$FFF2
$FFF3
$FFF4
$FFF5
$FFF6
$FFF7
—
$FFFA
$FFFB
$FFFC
$FFFD
$FFFE
$FFFF
TIM overflow vector (high)
TIM overflow vector (low)
TIM Channel 1 vector (high)
TIM Channel 1 vector (low)
TIM Channel 0 vector (high)
TIM Channel 0 vector (low)
Not used
IRQ vector (high)
IRQ vector (low)
SWI vector (high)
SWI vector (low)
Reset vector (high)
Reset vector (low)
2.5 Random-Access Memory (RAM)
The 128 bytes of random-access memory (RAM) are located at addresses $0080–$00FF. The location
of the stack RAM is programmable. The 16-bit stack pointer allows the stack to be anywhere in the
64-Kbyte memory space.
NOTE
For correct operation, the stack pointer must point only to RAM locations.
Before processing an interrupt, the central processor unit (CPU) uses five bytes of the stack to save the
contents of the CPU registers.
NOTE
For M6805, M146805, and M68HC05 compatibility, the H register is not
stacked.
During a subroutine call, the CPU uses two bytes of the stack to store the return address. The stack
pointer decrements during pushes and increments during pulls.
NOTE
Be careful when using nested subroutines. The CPU may overwrite data in
the RAM during a subroutine or during the interrupt stacking operation.
MC68HLC908QY/QT Family Data Sheet, Rev. 3
Freescale Semiconductor
31