MC68HLC908QY4 Datasheet, PDF (144/182 Pages) Motorola, Inc – Microcontrollers

Development Support
Table 15-1. Monitor Mode Signal Requirements and Options
Mode
Serial
Communi-
IRQ RST Reset _cation
(PTA2) (PTA3) Vector
Mode
Selection
PTA0 PTA1 PTA4
COP
Communication
Speed
External Bus
Baud
Clock Frequency Rate
Comments
Normal
Monitor
V_TST
V_DD
X
1
1
0
Disabled
9.8304
MHz
2.4576
MHz
9600
Provide external
clock at OSC1.
V_DD
Forced
X
$FFFF
(blank)
1
Monitor
V_SS
X
$FFFF
(blank)
1
X
X
Disabled
9.8304
MHz
2.4576
MHz
9600
Provide external
clock at OSC1.
X
X Disabled X
1.0 MHz
(Trimmed)
4800
Internal clock is
active.
User
X
X
Not
$FFFF
X
X
X Enabled
X
X
X
MON08
Function
[Pin No.]
V_TST
[6]
RST
[4]
—
COM MOD0 MOD1
[8]
[12] [10]
—
OSC1
[13]
—
—
1. PTA0 must have a pullup resistor to V_DD in monitor mode.
2. Communication speed in the table is an example to obtain a baud rate of 9600. Baud rate using external oscillator is bus
frequency / 256 and baud rate using internal oscillator is bus frequency / 206.
3. External clock is a 9.8304 MHz oscillator on OSC1.
4. X = don’t care
5. MON08 pin refers to P&E Microcomputer Systems’ MON08-Cyclone 2 by 8-pin connector.
NC 1
NC 3
NC 5
NC 7
NC 9
NC 11
OSC1 13
V_DD 15
2 GND
4 RST
6 IRQ
8 PTA0
10 PTA4
12 PTA1
14 NC
16 NC
Once out of reset, the MCU waits for the host to send eight security bytes (see 15.3.2 Security). After the
security bytes, the MCU sends a break signal (10 consecutive logic 0s) to the host, indicating that it is
ready to receive a command.
15.3.1.1 Normal Monitor Mode
RST and OSC1 functions will be active on the PTA3 and PTA5 pins respectively as long as V_TST is
applied to the IRQ pin. If the IRQ pin is lowered (no longer V_TST) then the chip will still be operating in
monitor mode, but the pin functions will be determined by the settings in the configuration registers (see
Chapter 5 Configuration Register (CONFIG)) when V_TST was lowered. With V_TST lowered, the BIH and
BIL instructions will read the IRQ pin state only if IRQEN is set in the CONFIG2 register.
If monitor mode was entered with V_TST on IRQ, then the COP is disabled as long as V_TST is applied to
IRQ.
MC68HLC908QY/QT Family Data Sheet, Rev. 3
144
Freescale Semiconductor