MC68HLC908QY4 Datasheet, PDF (100/182 Pages) Motorola, Inc – Microcontrollers

Input/Output Ports (PORTS)
PTAPUE[5:0] — Port A Input Pullup Enable Bits
These read/write bits are software programmable to enable pullup devices on port A pins.
1 = Corresponding port A pin configured to have internal pull if its DDRA bit is set to 0
0 = Pullup device is disconnected on the corresponding port A pin regardless of the state of its
DDRA bit
Table 12-1 summarizes the operation of the port A pins.
Table 12-1. Port A Pin Functions
PTAPUE
Bit
1
0
X
DDRA
Bit
0
0
1
PTA
Bit
X⁽¹⁾
X
X
I/O Pin
Mode
Input, V_DD(2)
Input, Hi-Z⁽⁴⁾
Output
Accesses to DDRA
Read/Write
DDRA5–DDRA0
DDRA5–DDRA0
DDRA5–DDRA0
1. X = don’t care
2. I/O pin pulled to V_DD by internal pullup.
3. Writing affects data register, but does not affect input.
4. Hi-Z = high impedance
5. Output does not apply to PTA2
Accesses to PTA
Read
Write
Pin
PTA5–PTA0⁽³⁾
Pin
PTA5–PTA0⁽³⁾
PTA5–PTA0
PTA5–PTA0⁽⁵⁾
12.3 Port B
Port B is an 8-bit general purpose I/O port. Port B is only available on the MC68HLC908QY1,
MC68HLC908QY2, and MC68HLC908QY4.
12.3.1 Port B Data Register
The port B data register (PTB) contains a data latch for each of the eight port B pins.
Address: $0001
Bit 7
Read:
PTB7
Write:
Reset:
6
PTB6
5
PTB5
4
3
PTB4
PTB3
Unaffected by reset
2
PTB2
1
PTB1
Bit 0
PTB0
Figure 12-5. Port B Data Register (PTB)
PTB[7:0] — Port B Data Bits
These read/write bits are software programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
MC68HLC908QY/QT Family Data Sheet, Rev. 3
100
Freescale Semiconductor