MC68HLC908QY4 Datasheet, PDF (113/182 Pages) Motorola, Inc – Microcontrollers

Exception Control
IF1 and IF3–IF5 — Interrupt Flags
These flags indicate the presence of interrupt requests from the sources shown in Table 13-3.
1 = Interrupt request present
0 = No interrupt request present
Bit 0, 1, 3, and 7 — Always read 0
13.6.2.2 Interrupt Status Register 2
Address: $FE05
Bit 7
6
5
4
3
2
1
Bit 0
Read: IF14
0
0
0
0
0
0
0
Write: R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
R = Reserved
Figure 13-12. Interrupt Status Register 2 (INT2)
IF14 — Interrupt Flags
This flag indicates the presence of interrupt requests from the sources shown in Table 13-3.
1 = Interrupt request present
0 = No interrupt request present
Bit 0–6 — Always read 0
13.6.2.3 Interrupt Status Register 3
Address: $FE06
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
0
0
0
IF15
Write: R
R
R
R
R
R
R
R
Reset: 0
0
0
0
0
0
0
0
R = Reserved
Figure 13-13. Interrupt Status Register 3 (INT3)
IF15 — Interrupt Flags
These flags indicate the presence of interrupt requests from the sources shown in Table 13-3.
1 = Interrupt request present
0 = No interrupt request present
Bit 1–7 — Always read 0
13.6.3 Reset
All reset sources always have equal and highest priority and cannot be arbitrated.
13.6.4 Break Interrupts
The break module can stop normal program flow at a software programmable break point by asserting its
break interrupt output. (See Chapter 15 Development Support.) The SIM puts the CPU into the break
MC68HLC908QY/QT Family Data Sheet, Rev. 3
Freescale Semiconductor
113