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MC68HLC908QY4 Datasheet, PDF (161/182 Pages) Motorola, Inc – Microcontrollers
16.12 Memory Characteristics
Memory Characteristics
Characteristic
Symbol
Min
Typ
Max
Unit
RAM data retention voltage
FLASH program bus clock frequency
VRDR
—
1.3
—
1
—
—
V
—
MHz
FLASH PGM/ERASE supply voltage (VDD)
FLASH read bus clock frequency
FLASH page erase time
<1 k cycles
>1 k cycles
VPGM/ERASE
2.7
—
3.6
V
fRead(1)
0
—
2
MHz
tErase
0.9
1
1.1
ms
3.6
4
5.5
FLASH mass erase time
FLASH PGM/ERASE to HVEN setup time
FLASH high-voltage hold time
FLASH high-voltage hold time (mass erase)
FLASH program setup time
FLASH program time
FLASH return to read time
FLASH cumulative program hv period
FLASH endurance(4)
tMErase
tNVS
tNVH
tNVHL
tPGS
tPROG
tRCV(2)
tHV(3)
—
4
10
5
100
5
30
1
—
10 k
—
—
—
—
—
—
—
—
100 k
—
ms
—
µs
—
µs
—
µs
—
µs
40
µs
—
ms
4
ms
—
Cycles
FLASH data retention time(5)
—
15
100
—
Years
1. fRead is defined as the frequency range for which the FLASH memory can be read.
2. tRCV is defined as the time it needs before the FLASH can be read after turning off the high voltage charge pump, by
clearing HVEN to 0.
3. tHV is defined as the cumulative high voltage programming time to the same row before next erase.
tHV must satisfy this condition: tNVS + tNVH + tPGS + (tPROG x 32) ≤ tHV maximum.
4. Typical endurance was evaluated for this product family. For additional information on how Freescale defines Typical
Endurance, please refer to Engineering Bulletin EB619.
5. Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated
to 25°C using the Arrhenius equation. For additional information on how Freescale defines Typical Data Retention, please
refer to Engineering Bulletin EB618.
MC68HLC908QY/QT Family Data Sheet, Rev. 3
Freescale Semiconductor
161