MC9S08DZ60 Datasheet, PDF (372/396 Pages) Freescale Semiconductor, Inc – Microcontrollers

Appendix A Electrical Characteristics
A.11 MCG Specifications
Table A-12. MCG Frequency Specifications (Temperature Range = –40 to 125°C Ambient)
Num C
Rating
1
Average internal reference frequency - untrimmed
2
Average internal reference frequency - trimmed
3
Internal reference startup time
4
DCO output frequency range - untrimmed
5
DCO output frequency range - trimmed
6
Resolution of trimmed DCO output frequency at fixed
voltage and temperature (using FTRIM)
7
Resolution of trimmed DCO output frequency at fixed
voltage and temperature (not using FTRIM)
8
Total deviation of trimmed DCO output frequency over
voltage and temperature
Total deviation of trimmed DCO output frequency over
9
fixed voltage and temperature range of 0 - 70 °C
10
FLL acquisition time ¹
11
PLL acquisition time ²
Long term Jitter of DCO output clock (averaged over
12
2mS interval) ³
13
VCO operating frequency
14
PLL reference frequency range
15
Long term accuracy of PLL output clock (measured over
2 ms
16
Jitter of PLL output clock measured over 625 ns⁴
17
Lock entry frequency tolerance ⁵
18
Lock exit frequency tolerance ⁶
Symbol
f_{int_ut}
f_{int_t}
t_irefst
f_{dco_ut}
f_{dco_t}
∆f_{dco_res_t}
∆f_{dco_res_t}
∆f_{dco_t}
∆f_{dco_t}
t_{fll_acquire}
t_{pll_acquire}
C_Jitter
f_vco
f_{pll_ref}
D_lock
D_unl
19
Lock time - FLL
t_{fll_lock}
20
Lock time - PLL
t_{pll_lock}
21
Loss of external clock minimum frequency - RANGE = 0 _{floc_low}
Min
25
31.25
—
25.6
32
—
—
—
—
—
7.0
1.0
± 1.49
± 4.47
—
—
(3/5) x f_int
Typical
32.7
—
55
33.48
—
± 0.1
Max
41.66
39.0625
100
42.66
40
± 0.2
Unit
kHz
kHz
us
MHz
MHz
%f_dco
± 0.2
+ 0.5
-1.0
± 0.5
0.02
—
—
TBD
TBD
—
—
—
—
—
± 0.4
±2
±1
1
1
0.2
55.0
2.0
%f_dco
%f_dco
%f_dco
ms
ms
%f_dco
MHz
MHz
± 2.98
± 5.97
t_{fll_acquire+}
1075(1/^fint_t)
t_{pll_acquire+}
1075(1/^fpll_ref)
—
%
%
s
s
kHz
22
Loss of external clock minimum frequency - RANGE = 1 _{floc_high}
(16/5) x f_int
—
—
kHz
1 _{This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or changing}
from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference, this
specification assumes it is already running.
2 _{This specification applies to any time the PLL VCO divider or reference divider is changed, or changing from PLL disabled (BLPE,}
BLPI) to PLL enabled (PBE, PEE). If a crystal/resonator is being used as the reference, this specification assumes it is already
running.
MC9S08DZ60 Series Data Sheet, Rev. 1 Draft E
372
PRELIMINARY
Freescale Semiconductor
Subject to Change