MSC8112 Datasheet, PDF (33/44 Pages) Freescale Semiconductor, Inc – Dual Core Digital Signal Processor

2.5.10.3 RMII Mode
Table 26. RMII Mode Signal Timing
No.
Characteristics
806 ETHTX_EN,ETHRXD[0–1], ETHCRS_DV, ETHRX_ER to ETHREF_CLK rising edge set-up
time
807 ETHREF_CLK rising edge to ETHRXD[0–1], ETHCRS_DV, ETHRX_ER hold time
811 ETHREF_CLK rising edge to ETHTXD[0–1], ETHTX_EN output delay.
1.1 V Core
Min
Max
1.6
—
1.6
—
3
12.5
Unit
ns
ns
ns
ETHREF_CLK
ETHCRS_DV
ETHRXD[0–1]
ETHRX_ER
ETHTX_EN
ETHTXD[0–1]
806
807
Valid
811
Valid
Valid
Figure 25. RMII Mode Signal Timing
MSC8112 Dual Core Digital Signal Processor Data Sheet, Rev. 0
Freescale Semiconductor
33