XRS10L620 Datasheet, PDF (8/49 Pages) Exar Corporation – PCI-X to 2-SATA/1-PATA Host Controller

XRS10L620 Rev 1.00
5.3 Pin Descriptions
z 5.3.1 PCI interface
Pin Name
Pin#
Type
Description
AD[31:0]
85-89,91,93,94, I/O PCI Multiplexed Address and Data
97-100,102-105,
118-120,122-126,
128,2,3,5-9
BE[3:0]#
95,106,117,127 I/O PCI Command/Byte Enable
PAR
115
I/O PCI Parity
FRAME#
107
I/O PCI Cycle Frame
TRDY#
110
I/O PCI Target Ready
IRDY#
108
I/O PCI Initiator Ready
STOP#
113
I/O PCI Stop
DEVSEL#
112
I/O PCI Device Select
IDSEL
96
I PCI Initialization Device Select
INTA#
78
O PCI Interrupt Request A
PREQ#
83
O PCI Master Request
PGNT#
82
I PCI Master Grant
PCLK
81
I PCI Clock
PRST#
80
I PCI Reset
M66EN
121
I PCI 66MHz indication
z 5.3.2 Serial ATA interface
Pin Name
Pin#
RSVXO
19
OSCI
20
TX0P
28
TX0N
27
RX0N
24
RX0P
23
RX1P
16
RX1N
15
TX1N
12
TX1P
11
Type
Description
O Reserved for internal test.
I External oscillator input.
The clock rate is 25MHz, 1.8V level.
O SATA 0 positive output of the differential signal
O SATA 0 negative output of the differential signal
I SATA 0 positive input of the differential signal
I SATA 0 positive input of the differential signal
I SATA 1 positive input of the differential signal
I SATA 1 positive input of the differential signal
O SATA 1 negative output of the differential signal
O SATA 1 positive output of the differential signal
7
1/20/2009