MC3630 Datasheet, PDF (57/83 Pages) –

MC3630 3-Axis Accelerometer
Preliminary Datasheet
(0x14) Sniff Configuration Register
This register selects which of the six shadow registers is being accessed in register 0x13, and
controls settings of the SNIFF hardware.
Addr Name
7
0x14 SNIFFCF_ SNIFF_
C
RESET
6
SNIFF_
MUX[2]
5
SNIFF_
MUX[1]
Bit
POR
Valu
4
3
2
1
0
e R/W
SNIFF_
MUX[0]
SNIFF_ SNIFF_ SNIFF_ SNIFF_ 00000 RW
CNTEN THADR[2] THADR[1] THADR[0] ⁰⁰⁰
Bit
[2:0]
3
[6:4]
Name
Description
SNIFF_ THADR[2:0]
Bit Field
Register selected by 0x13[5:0]
000
None
001
SNIFF Threshold, X-axis
010
SNIFF Threshold, Y-axis
011
SNIFF Threshold, Z-axis
100
None
101
SNIFF Detection Count, X-axis
110
SNIFF Detection Count, Y-axis
111
SNIFF Detection Count, Z-axis
SNIFF_ CNTEN
This bit enables the SNIFF detection counts for all
channels.
0: Do not use SNIFF detection counters. (default)
1: Enable SNIFF detection counts, required for valid
SNIFF wakeup
SNIFF_ MUX[2:0]
This field determines which 6-bits of the 11-bit delta
count will be compared against the 6-bit threshold value
for each channel. Clamp logic allows any SNIFF delta
exceeding the selected 6-bit range to still be detected as
a valid event. See examples below.
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APS-048-0047v1.2
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