MC3630 Datasheet, PDF (50/83 Pages) –

MC3630 3-Axis Accelerometer
Preliminary Datasheet
(0x11) Rate Register 1
This register configures the sample rates for wake modes. The rates also depend upon the
value in register 0x1C. The device has several power modes which can be adjusted to achieve
a desired power consumption at a certain ODR. The tradeoff for lower power is either higher
noise or lower ODR. See the table below.
NOTE: The power mode bits referenced in 0x1C are different than for the SNIFF rates.
Bit
Addr
Name
POR
Value
R/W
7
6
5
4
3
2
1
0
0x11
RATE_1
RESV MAN_SEL[2] MAN_SEL[1] MAN_SEL[0] WR[3]
WR[2]
WR[1]
WR[0] 00000000 RW
Register 0x11 Value
0x05
Ultra-Low Power
(0x1C[2:0]=>0x03)
CWAKE ODR
(Hz)
Current (µA)
n/a
Low Power
(0x1C[2:0]=>0x00)
CWAKE ODR
(Hz)
Current (µA)
14
1
Precision
(0x1C[2:0]=>0x04)
CWAKE ODR
(Hz)
Current (µA)
14
5
0x06
25
0.9
28
1.6
28
10
0x07
50
1.6
54
2.7
55
18
0x08
100
2.8
105
5
80
25
0x09
190
5.5
210
11
n/a
0x0A
380
10
400
19
n/a
0x0B
750
18
600
26
n/a
0x0C
1100
26
n/a
n/a
0x0F^*NOTE
1300
36
750
36
100
36
Table 22. Rate Register 1 Configuration
NOTE: Specific setup steps are required in order to set up Software Defined rate 0x11 = 0x0F
(“Rate 15”). Details of software defined rate will be discussed in the application note AN-002.
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