GC4116 Datasheet, PDF (57/57 Pages) List of Unclassifed Manufacturers – MULTI-STANDARD QUAD DUC CHIP

GC4116 REGISTER ASSIGNMENT QUICK REFERENCE GUIDE
Page Address
Name
7(MSB)
6
5
4
3
2
1
0(LSB)
Suggested
Default
I7
O
C
O
N
T
R
O
L
R8
E
S
A
M
P
L
E
R
9
32-63
16
17
18
19
20
21
22
23
24
25
16
17
18
19
20
21
22
23
16-19
20-23
24-27
28-31
16-31
Channel Input
PARALLEL_D PARALLEL_C PARALLEL_B PARALLEL_A
SFS_POL
SCK_POL
-
PACKED
Resampler Input RES_PAR_D RES_PAR_C RES_PAR_B RES_PAR_A
RFS_POL
RCK_POL
SC_MODE RES_PACKED
Resampler Out
ROCK_SYNC (See below)
ROFS_POL ROCK_POL
ROCK_RATE
Sum IO Mode
SUM_CLEAR SUM_DELAY
SUM_SCALE
SUM_ROUND
Serial Controller
SCCK_SYNC (See Below)
SCFS_POL
SCCK_POL
SCCK_RATE
SC Frame Count
SC_FRAME_CNT
SC FS Delay A,B
SC_FRAME_DELAY_B
SC_FRAME_DELAY_A
SC FS Delay C,D
SC_FRAME_DELAY_D
SC_FRAME_DELAY_C
Output Enables RREQ_POL CHREQ_POL
-
SO_EN
SC_EN
REQ_EN
RES_EN
SUM_EN
Res Clock Divder
RES_CLK_DIV clock rate = 2*F_CK/(1+RES_CLK_DIV)
N-Channels
-
RES_SYNC
NF=(NFILTER-1)
NC =(NCHAN-1)
N-Multiplies
-
NO_SYM_RES
NM=(NMULT-1)
Filter Select
FILTER_SEL_3
FILTER_SEL_2
FILTER_SEL_1
FILTER_SEL_0
Final Shift
-
-
ROUND (12B,16B, 20B,24B)
FINAL_SHIFT
Channel Map
CHAN_MAP_D
CHAN_MAP_C
CHAN_MAP_B
CHAN_MAP_A
Ratio Sync
-
RATIO_SYNC
TEST (must be 0)
unused
-
Ratio Map
Res Ratio 0
RATIO_MAP_3
RATIO_MAP_2
RATIO_MAP_1
RATIO_0, Resampler ratio 0. RATIO = 2²⁶(Resampler input sample rate)/(Resampler output sample rate)
RATIO_MAP_0
Res Ratio 1
RATIO_1, Resampler ratio 1.
Res Ratio 2
RATIO_2, Resampler ratio 2.
Res Ratio 3
RATIO_3, Resampler ratio 3.
Filter Taps
Resampler Coefficients, 8 LSBs in even addresses, 4 MSBs in odd addresses. (Must be loaded in the blocks 16-23 and 24-31)
01
03
51
80
51
17
11
11
1F
00
23
0E
00
34
E4
70
00
00
04000000
04000000
04000000
04000000
= { }{ } GAIN
 ^1--G-2---8--



 ^{P----F---I6--R-5---_5---S3---6U-----M----}



N⁴ 2^{–(SCALE + 12 × BIG_SHIFT + 3)}
2^{SUM_SCALE – 7}
( ) ( 2 ) RES_GAIN = _{3---2---7---6-R--8--E---×}^{-S---_-N--S--D-U---E--M--L----A----Y---}
FINAL_SHIFT
Sync Circuit Mode 1 Description
Default Sync Circuit Mode 1 Description
Default
INT_SYNC
SIA Interpolation control counter. 1(SIA) GAIN_SYNC
SIB A single bit sync selection.
0
Sets timing of CHREQ.
GAIN_SYNC=0 means the
gain is applied immediately.
GAIN_SYNC=1 means the
gain is applied after SIB.
COUNTER_
SYNC
SIA Internal sync counter.
2 (OS) DIAG_SYNC
Generates TC sync. Mode 2
is always ONE_SHOT
SIA Selects when to start the
2 (TC)
diagnostic ramp and to store
the diagnostic checksum.
OUTPUT_
SYNC
SIA The output sync (SO)
selection.
2 (TC) FREQ_SYNC
SIB Selects when new frequency 3 (on)
settings take effect.
ROCK_SYNC
SIA Syncs the resampler’s serial
output clock. Mode 2 is SIB.
PHASE_SYNC SIB Selects when new phase
settings take effect.
3 (on)
SCCK_SYNC
SIA Syncs the serial controller’s
serial output clock. Mode 2 is
SIB.
NCO_SYNC
SIB Reset the NCO phase
accumulator
0 (off)
RES_SYNC
Note 1 Syncs the resampler during
initialization
DITHER_
SYNC
SIB Clears the NCO dither circuit. 0 (off)
RATIO_SYNC Note 1 Selects when a new
resampler ratio takes effect.
FLUSH _
(A,B,C,D)
SIA Starts a flush of the channel 1 (SIA)
Note 1: These use a 3 bit sync mode selection where modes 0,1 and 5 are “off”, mode 2 is SIA, mode 3 is SIB, mode 4 is ONE_SHOT,
and modes 6 and 7 are “on”.
REV 1.0
APRIL 27, 2001