GC4116 Datasheet, PDF (36/57 Pages) List of Unclassifed Manufacturers – MULTI-STANDARD QUAD DUC CHIP

GC4116 MULTI-STANDARD QUAD DUC CHIP
PAGE 1: Channels C and D
ADDRESSES 16, 17, 18, and 19: Frequency Channel C
ADDRESS
16
17
18
19
TYPE
R/W
R/W
R/W
R/W
NAME
FREQ_C[0:7]
FREQ_C[8:15]
FREQ_C[16:23]
FREQ_C[24:31]
DESCRIPTION
Byte 0 (LSBs) of FREQ_C
Byte 1 of FREQ_C
Byte 2 of FREQ_C
Byte 3 (MSBs) of FREQ_C
ADDRESSES 20, 21: Phase Channel C
ADDRESS
20
21
TYPE
R/W
R/W
NAME
PHASE_C[0:7]
PHASE_C[8:15]
DESCRIPTION
Byte 0 (LSBs) of PHASE_C
Byte 1 (MSBs) of PHASE_C
ADDRESSES 24, 25, 26, and 27: Frequency Channel D
ADDRESS
24
25
26
27
TYPE
R/W
R/W
R/W
R/W
NAME
FREQ_D[0:7]
FREQ_D[8:15]
FREQ_D[16:23]
FREQ_D[24:31]
DESCRIPTION
Byte 0 (LSBs) of FREQ_D
Byte 1 of FREQ_D
Byte 2 of FREQ_D
Byte 3 (MSBs) of FREQ_D
ADDRESSES 28, 29: Phase Channel D
ADDRESS
20
21
TYPE
R/W
R/W
NAME
PHASE_D[0:7]
PHASE_D[8:15]
DESCRIPTION
Byte 0 (LSBs) of PHASE_D
Byte 1 (MSBs) of PHASE_D
DATA SHEET REV 1.0
5.4 INPUT GAIN PAGE (PAGE 2)
This page contains independent gain settings for the four channels. Gain is G/128, where G is in two’s complement format.
Page two registers are listed in the table below.
ADDRESSES 16, 17, 18, and 19: Input Gain
ADDRESS
16
17
18
19
TYPE
R/W
R/W
R/W
R/W
NAME
GAIN_A[0:7]
GAIN_B[0:7]
GAIN_C[0:7]
GAIN_D[0:7]
DESCRIPTION
The gain (G) for channel A
The gain (G) for channel B
The gain (G) for channel C
The gain (G) for channel D
© 1999−2001 GRAYCHIP,INC.
- 31 -
APRIL 27, 2001
This document contains preliminary information which may be changed at any time without notice